Implementation Engineer (M/W)
❓ About SiPearl…
Founded in 2019 with the support of the European Union 🇪🇺, SiPearl embodies Europe's dream of mastering the technological heart of its supercomputers: the microprocessor.
SiPearl is building Rhea, the high-performance, low-power European microprocessor dedicated to supercomputing and AI inference.
This new generation of microprocessors will first target EuroHPC Joint Undertaking ecosystem, which is deploying world-class supercomputing infrastructures in Europe for solving major challenges in medical research, artificial intelligence, security, energy management and climate with a reduced carbon footprint.
SiPearl is working in close collaboration with its 30 partners from the European Processor Initiative (EPI) consortium - leading names from the scientific community, supercomputing centers and industry - which are its stakeholders, future clients and end-users.
SiPearl employs more than 190 people in:
- France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis),
- Germany (Duisburg)
- Spain (Barcelona)
- and Italy (Bologna)
SiPearl is part of French Tech Next 120 programme 2024 class.
💻 About the role
In this role, you will work closely with Vivian Blanchard, our VP R&D Hardware in order to perform physical implementation and verification on our design along with collaborating with different teams from the Hardware department.
🎯 What a regular day at the job might look like
- Perform physical implementation on module-level using cutting-edge technologies (beyond 7nm)
- Perform physical verification on module-level (extraction, physical verification)
- Perform timing-closure by running STA and generating timing-ECOs
- Perform design-finishing (Logic-ECO-cells, Filler-, TCD-, ESD-cell, etc.)
- Optimize module-level layout for performance, power and area (Vt-Opt, clock-gating, etc.)
- Review and sign-off according to deliver final macro to toplevel team
- Work with synthesis- and DfT-team to sort out netlist issues, suggesting solutions
- Insert and verify Power-Aware structures, e.g. isolation, always-on-buffer (using UPF flow)
- Collaborate with the DfT team (e.g. scan-chain-reordering)
- Contribute in bring-up of Layout Flow (using Lynx environment)
- Collaborate with the IP design teams locally or remotely
- Collaborate with the ASIC service company for chip implementation in different time-zones
🔍 What would make you succeed in this role
- At least 5 years of experience of logical/physical synthesis, constraint development and signoff
- Senior experience in using synthesis tools especially Synopsys DC-NXT and Fusion-Compiler
- Senior experience in using STA tooling, especially Prime-Time
- Fluency in English is a prerequisite for success in this role, as effective communication in English is essential for collaboration and ensuring the seamless execution of responsibilities.
➕ Experience in the following is a plus:
- Cadence tooling
- Autonomy, flexibility and adaptability
- Being a team player
Dear candidate, even if you consider you do not fulfill all the qualifications mentioned above, please still apply and share with us why you believe you would be a good fit.
Recruitment process
✔️Discovery interview with our Talent Acquisition Partner (30 min)
✔️ AssessFirst personality test - no need to worry, there is no wrong or right answer; our goal is to see beyond your resume (45')
✔️ 2 Technical interviews (1h each)
✔️ Interview with one HRBP in order to answer to your last questions (30 min)
💡 Benefits and conditions
- Contract: Permanent Contract (CDI)
- Benefits: meal vouchers (Sodexo), health insurance (70% covered by SiPearl), 8 to 9 RTTs, 5 days per year of remote work from any EU location
- Work model: Hybrid (2 days remote)
- 📍 Location: Maisons-Laffitte/ Grenoble/ Sophia Antipolis/ Barcelona/ Balogna
- Awesome activities such as: Hackathons, Training Challenges, Quarterly Kick-off sessions, team events, Company events and much more
Are you curious to learn more about us?
- Follow us on LinkedIn to stay updated with our latest news
- Get updated about our recruiting activities: Sipearl careers webpage
- Get to know a bit more about our team culture: Welcome to the jungle
At SiPearl, we are dedicated to building a diverse and inclusive workplace that thrives on the strength of varied perspectives and backgrounds. We recruit talent based on merit, experience, and alignment with our company's goals and values.
- Department
- Hardware
- Role
- Implementation
- Locations
- Valbonne, Maisons-Laffitte, Massy, Castelldefels, Duisburg, Grenoble, Bologna
- Remote status
- Hybrid
About SiPearl
Founded in 2019 with the support of the European Union, SiPearl embodies Europe's dream of mastering the technological heart of its supercomputers: the microprocessor.
SiPearl is building Rhea, the high-performance, low-power European microprocessor dedicated to supercomputing and AI inference.
This new generation of microprocessors will first target EuroHPC Joint Undertaking ecosystem, which is deploying world-class supercomputing infrastructures in Europe for solving major challenges in medical research, artificial intelligence, security, energy management and climate with a reduced carbon footprint.
SiPearl is working in close collaboration with its 30 partners from the European Processor Initiative (EPI) consortium - leading names from the scientific community, supercomputing centers and industry - which are its stakeholders, future clients and end-users.
SiPearl employs more than 200 people in:
- France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis),
- Germany (Duisburg)
- Spain (Barcelona)
- and Italy (Bologna)
SiPearl is part of French Tech 120 program 2024 class.
Implementation Engineer (M/W)
Loading application form