[Internship] DFT Engineer
About SiPearl…
Founded in 2019 by Philippe Notton and financed by the European Union, SiPearl embodies Europe's dream of mastering the technological heart of its supercomputers: the microprocessor.
SiPearl is building Rhea, the world's first energy-efficient #HPC-dedicated microprocessor designed to work with any third-party accelerator (#GPU, #AI, #quantum). It will help Europe solving major challenges in medical research🧬, artificial intelligence, security 🛡️, energy management and climate 🌱while reducing its environmental footprint.
Since our creation in 2019, we host 170 collaborators in 6 offices: France (Maisons-Laffitte, Massy, Grenoble, Sophia Antipolis), Germany (Duisburg), Spain (Barcelona).
After a successful series A in 2023 (90M EUR), SiPearl has recently won an emblematic contract to equip Europe’s first exascale supercomputer, JUPITER, who will be operated by the EuroHPC’s center of research. And as the dream of a European machine, crossing the 1 billion billion mark calculations per second thanks to an European microprocessor, is becoming reality, SiPearl is willing to hire 150 engineers by the end of 2024!
💻 About the role:
In this role, you will work closely with Cleber Moretti, our Senior DFT Engineer
🎯 What a regular day might look like:
- Learning DFT Fault Concepts and Techniques:
- SCAN insertion
- Boundary SCAN
- DRC rules checks
- ATPG (Automatic Test Pattern Generation)
- Test-coverage goals
- Hands-on TCL scripting tasks:
- DRC checks by SPYGLASS in RTL
- Executing schematic analysis/debug
- DFT design constraints creation
- Additional DFT topics:
- Incorporating more DFT topics based on candidate evaluation during the training period.
🔍 What would help you have a successful internship experience:
• You have a Electric Engineering degree with focus in Microelectronics
• You are familiar with programming languages as:
- PEARL
- TCL
- PYTHON
- C
- VERILOG
- Any experience in Design for Testability (DFT) is considered a plus.
• Fluency in English is a prerequisite for success in this role, as effective communication in English is essential for collaboration and ensuring the seamless execution of responsibilities
Recruitment process
✔️Discovery interview with our HRBP (30')
✔️ Personality test - no need to worry, there is no wrong or right answer; our goal is to get to see beyond your resume (45')
✔️ Interview with Cleber Moretti, Senior DFT Engineer (1h)
💡 Good to know :
- Contract: 6 months end-of-studies Internship
- Benefits: meal vouchers (Sodexo), 3 paid vacation days
- Work model: On-Site
- 📍 Location: Sophia - Antipolis
- Between 2022-2023, 90% of our interns got recruited at the end of their internship
Are you curious to learn more about us?
- Follow us on LinkedIn to stay updated with our latest news
- Get updated about our recruiting activities: SiPearl careers webpage
- Get to know a bit more about our team culture: Welcome to the Jungle
At SiPearl, we are dedicated to building a diverse and inclusive workplace that thrives on the strength of varied perspectives and backgrounds. We recruit talent based on merit, experience, and alignment with our company's goals and values.
- Department
- Hardware
- Role
- Design For Test (DFT)
- Locations
- Valbonne Sophia Antipolis
Valbonne Sophia Antipolis
About SiPearl
Whether senior or junior engineers; whether specializing in embedded firmware, microelectronics design, virtual prototyping, modeling & simulation or software development, the SiPearl team works with the best of global microprocessor technologies: multi-core architecture, Neoverse® V1 platform from industry leader ARM, 6nm fabrication process,
[Internship] DFT Engineer
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